Assoc Professor Paul Beckett

Position

Associate Professor

School /
Work Unit

Electrical and Computer Eng

Contact Details

+61 3 9925 5301

pbeckett@rmit.edu.au

Location

Building: 10
Level: 10
Room: 12

City Campus

College/Portfolio

Science, Engineering & Health

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Key activities

  • Senior Lecturer
  • Program Director, M. Eng (Computer Engineering)

Qualifications

  • B. Eng (Comm)
  • M. Eng
  • Grad. Dip (University T&L)
  • PhD

Employment history

  • 2001-present, Senior Lecturer: School of Electrical and Computer Engineering, RMIT
  • 1999 – 2000, Acting Head: Department of Computer Systems Engineering
  • 1997 – 1998, Course Leader: Department of Computer Systems Engineering
  • 1996 – 1997, Acting Course Leader: Department of Computer Systems Engineering
  • 1989 – 1996, Senior Lecturer: Department of Computer Systems Engineering, RMIT
  • 1984 – 1989, Lecturer: Department of Computer Systems Engineering.
  • 1983 – 1984, Professional Officer: Faculty of Engineering (Joint Microelectronic Research Centre)
  • 1980 – 1983, Advanced Development Engineer: Philips TMC
  • 1978 – 1980, Project Engineer/Senior Tutor: Dept Communication & Electronic Engineering, RMIT

Areas of research and consulting expertise

  • Emerging technologies – nanoscale computer architecture
  • High Performance Digital Logic Design
  • Embedded Computer Architecture
  • Programmable Logic Synthesis - FPGA and CPLD based design
  • Hardware Description Languages: VHDL
  • VLSI Design
  • PC-based graphics systems
  • Computer-based training/aptitude systems

Professional interests / Industry collaboration

  • Senior Member, IEEE
  • 2002, Parallel Image Based Modelling & Rendering
  • In collaboration with Engen Institute - research into algorithms for depth extraction from 2D images.Parallelization of algorithms for visualisation
  • 1993 – 1999, A Basic Aptitude Tester – AUSBAT
  • In collaboration with personnel of the Directorate of Psychological Services (DPSYCH-AF, RAAF)

Conferences

  • Member, Technical Committee - Simulation Technology and Training Conference - SimTecT96 to SimTecT 2000 (Chair, Technical Committee – SimTecT97; Abstracts coordinator SimTecT 1998 -2003).
  • Speaker - Great Lakes Symposium on VLSI, Washington, D.C, April 2003.
  • Speaker - Reconfigurable Architecture Workshop, RAW2003, Nice, France, April 2003
  • Speaker - 1st International Workshop on Field Programmable Technology, FTP2002, Hong Kong, First Workshop On Non-Silicon Computing, NSC-1. 2002. Boston, USA., December 2002
  • Speaker - Seventh Asia-Pacific Computer Systems Architecture Conference, ACSAC'2002. 2002. Melbourne, Australia.
  • Speaker - Symposium on Extended Instruction Set Architecture, Seoul, Korea, July 2000

Achievements

Over 26 years experience as Lecturer/Senior Lecturer in digital logic hardware, microprocessor and embedded hardware and software systems. Design and development of new post-graduate programs.

Grants and Donations

  • 2002: Source: Victorian Partnership for Advanced Computing – Parallel IBMR research. Amount: $5000
  • 2001: Source: Motorola Foundation. Equipment and program development donation. Amount: $63,500 (with A/Prof John Kneen)
  • 2000: Source: DITR – TRA: Travel grant for EISC workshop in Korea. Amount: $12,500 (approx)
  • 1999: Source: Asia Design Corporation – Micro-architecture study for EISC Microcontroller. Amount: $62,500 (approx)
  • 1997: Source: Advanced Engineering Centre for Manufacturing – “Virtual Prototyping” proposal. Amount: $50,000 (approx).

Selected publications

Journal articles

P. Beckett , "A low-power reconfigurable logic array based on double-gate transistors," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 16, pp. 115-123, Feb 2008.

Conference proceedings

P. Beckett , "Performance characteristics of a nanoscale double-gate reconfigurable array," in Proceedings of SPIE, Volume 7268: Smart Structures, Devices and Systems IV, Melbourne, Australia, 2008, art. no. 7268-14.

Beckett , P. & Zeng, L. (2007). 'Soft Error Rate Estimation in Deep Sub-Micron CMOS' The 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC07), Michael Hobbs, Yennun Huang, Wanlei Zhou (ed.), The 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC07).

Beckett , P. & Zeng, L. (2007). 'Soft Error Rate Estimation in Deep Sub-Micron CMOS' The 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC07), Michael Hobbs, Yennun Huang, Wanlei Zhou (ed.), The 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC07).

Thakkar, D., Lethbridge, G., Targownik, T., Ling, A., Sadik, A., Beckett , P. & Hussain, Z. (2007). 'An FPGA-Based Digital Class-D Amplifier Using Short Word-Length' ATNAC 2007 Australasian Telecommunication Networks and Applications Conference 2007, Dr Richard Green, University of Canterbury (ed.), Australasian Telecommunication Networks and Applications Conference (ATNAC-2007).

Beckett , P. 2005, 'Low-power circuits using dynamic threshold devices', Proceedings of the Great Lakes Symposium on VLSI, J. Lach et al. (ed.), ACM Press, Illinois (15th ACM Great Lakes Symposium on VLSI).

Beckett , P. 2005, 'Low-power spatial computing using dynamic threshold devices', Proceedings of the ISCAS, R. Ishii and L. Trajkoviae (ed.), IEEE, Piscataway, NJ (ISCAS 2005).

Beckett , P. 2005, 'Why area might reduce power in nanoscale CMOS', Proceedings of the ISCAS Conference, R. Ishii and L. Trajkoviae (ed.), IEEE, Piscataway, NJ (ISCAS 2005).

Beckett , P. 2005, 'A nanowire array for reconfigurable computing', Proceedings of the Tencon 2005 IEEE Region 10 Conference, R. Harris (ed.), IEEE, Melbourne (Tencon 2005 IEEE Region 10 Conference).

More research information and to access some of my papers