Course Title: Semiconductor Device Fabrication

Part A: Course Overview

Course Title: Semiconductor Device Fabrication

Credit Points: 12.00

Terms

Course Code

Campus

Career

School

Learning Mode

Teaching Period(s)

EEET2045

City Campus

Postgraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 1 2006,
Sem 2 2006,
Sem 1 2007,
Sem 2 2007,
Sem 2 2008,
Sem 1 2009,
Sem 1 2010,
Sem 1 2011,
Sem 1 2012,
Sem 1 2013,
Sem 1 2014,
Sem 1 2016

EEET2045

City Campus

Postgraduate

172H School of Engineering

Face-to-Face

Sem 1 2017,
Sem 1 2018,
Sem 1 2019,
Sem 1 2020,
Sem 1 2021,
Sem 1 2022,
Sem 1 2023

EEET2155

City Campus

Undergraduate

125H Electrical & Computer Engineering

Face-to-Face

Sem 1 2006,
Sem 2 2006,
Sem 1 2009,
Sem 1 2010,
Sem 1 2011,
Sem 1 2012,
Sem 1 2013,
Sem 1 2014,
Sem 1 2016

EEET2155

City Campus

Undergraduate

172H School of Engineering

Face-to-Face

Sem 1 2017,
Sem 1 2018,
Sem 1 2019,
Sem 1 2020,
Sem 1 2021,
Sem 1 2022,
Sem 1 2023

Course Coordinator: Prof. Anthony Holland

Course Coordinator Phone: +61 3 9925 2150

Course Coordinator Email: anthony.holland@rmit.edu.au

Course Coordinator Location: 10.08.09

Course Coordinator Availability: Email for appointment


Pre-requisite Courses and Assumed Knowledge and Capabilities

There is no pre-requisite course, however, it is advantageous to have a basic knowledge of electronics. 


Course Description

The course will focus on the fabrication procedures which are used in industry to produce semiconductor devices. The topic material will be supported where practicable by laboratory/clean room demonstrations and student activities relevant to the various processes presented in lectures.

The subject material is divided into five modules as follows:

  • Introduction of basic fabrication processes, materials and clean room protocols.
  • Photolithography, masking and patterning of materials.
  • Semiconductor oxidation and diffusion.
  • Ion implantation and thermal processing.
  • Metal and dielectric deposition for contacts, gate and interconnect engineering.


Objectives/Learning Outcomes/Capability Development

This course develops the following program learning outcomes of the Bachelor of Engineering (Honours) for students who commenced their program prior to 2023:

     1.3 In-depth understanding of specialist bodies of knowledge within the engineering discipline.
     1.4 Discernment of knowledge development and research directions within the engineering discipline.
     2.1 Application of established engineering methods to complex engineering problem solving.
     2.2 Fluent application of engineering techniques, tools and resources.

This course develops the following program learning outcomes of the Bachelor of Engineering (Honours) for students who commenced their program in 2023:

  • PLO1: Demonstrate an in-depth understanding and knowledge of fundamental engineering and scientific theories, principles and concepts and apply advanced technical knowledge in specialist domain of engineering. 
  • PLO2: Utilise mathematics and engineering fundamentals, software, tools and techniques to design engineering systems for complex engineering challenges.    
  • PLO3: Apply engineering research principles, methods and contemporary technologies and practices to plan and execute projects taking into account ethical, environmental and global impacts.     
  • PLO4: Apply systematic problem solving, design methods and information and project management to propose and implement creative and sustainable solutions with intellectual independence and cultural sensitivity. 

This course contributes to the following program learning outcomes for the Master of Engineering:

  • High levels of technical competence in the field
  • Be able to apply problem solving approaches to work challenges and make decisions using sound engineering methodologies


On completion of this course you should be able to:

  1. Describe the clean room environment/laboratory procedures for semiconductor device (chip) fabrication.
  2. Explain the basic theory and practice of processing steps used in the fabrication of silicon chips and schedule a process flow using these steps for silicon chip fabrication.
  3. Describe the specialized equipment used in silicon chip fabrication and prescribe their use in designing process flow for a silicon chip.
  4. Design actual layout patterns for fabrication of a silicon chip for electronic circuit components, translated from circuit diagrams. 
  5. Solve complex interconnected problems
  6. Work in a team environment with minimal direction from a supervisor.

 


Overview of Learning Activities

The course is based on a series of pre-recorded lectures covering the stated topics, There will also be lectorials, tutorials and laboratory activities. Some laboratory sessions will be delivered on campus and others online. In addition, you are expected to undertake self-paced exercises on the topic material. In summary, the delivery methods will cover the following:

Lectorial and tutorial presentations which allow student interaction and which align with recorded lecture presentations,

Self-paced exercises and problem solving work will focus on application of technical skills,

Supervised laboratory demonstrations and laboratory practice to enhance your technical competence. For students who cannot attend on campus, the demonstrations will be online. There will be simulation lab work which will be online for all students and is the focus of the lab report assessment. 


Overview of Learning Resources

Learning resources for this course include:

  • Lecture Notes (as part of course learning guide) prepared by the teaching staff.
  • Prescribed textbook/s: See the course guide available at the start of classes.

Recommended reference books: See the course guide available at the start of classes.


Overview of Assessment

This course has no hurdle requirements.

The assessment for this course comprises:

  • One multiple choice class quiz
  • One class test (this assessment is a timed and timetabled assessment that students must attend on campus except for international students who are outside Australia)
  • One report on laboratory activities which include semiconductor fabrication process planning, chip layout design and computer simulation. This report is due at the end of semester
  • One-end-of-semester take-home written assignment



Assessment tasks 

Early Assessment Task: Class Quiz
Weighting 15% (fifteen percent of course marks)
This assessment task supports CLOs 1, 2, 3

Assessment Task 2: Class Test
Weighting 30% (thirty percent of course marks)
This assessment task supports CLOs 2, 3, 4, 5

Assessment Task 3: Laboratory Report
Weighting 25% (twenty five percent of course marks)
This assessment task supports CLO 4, 5, 6

Assessment Task 4: Written Assignment
Weighting 30% (thirty percent of course marks)
This assessment supports CLOs 3, 4, 5